High Level Synthesis (HLS) is a promising technology where algorithms described in high-level languages are automatically transformed into a hardware design. This paper describes a compiler toolchain that automatically transforms existing software in a limited domain to a functional hardware design.
Authors
Teemu Rinta-aho (Ericsson Research), Mika Karlstedt (Ericsson Research), Madhav P. Desai (IIT Bombay)
http://www.ericsson.com/news/the-click2net-fpga-toolchain_244159017_c?idx=10
The Click2NetFPGA Toolchain
Nhãn:
Ericsson,
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